中文版
 

Prof. Lain-Jong (Lance) Li: Perspective on the Future Electronics Based on Two-Dimensional Materials (2023/10/25)

( 2023-10-12 )

Title

Perspective on the Future Electronics Based on Two-Dimensional Materials

Speaker


Prof. Lain-Jong (Lance) Li

The University of Hong Kong


  


Time

3:00pm, October 25, 2023

Place

Conference room on 3F, Material Science and Research Building

Brief Bio of the Speaker

Professor Lain-Jong (Lance) Li received his BSc and MSc in chemistry at National Taiwan University. He obtained his PhD in condensed matter physics at Oxford University in 2006. He was an Assistant Professor in Nanyang Technological University Singapore (2006-2009). Since 2010, he has become an Associate Professor at Academia Sinica Taiwan. He joined King Abdullah University of Science and Technology in 2014 and became a Full Professor in 2016. He then took the Director position in Corporate Research at the most advanced foundry company, Taiwan Semiconductor Manufacturing Company (TSMC), from 2017-2020. He joined the University of Hong Kong as a Chair Professor in nanomaterials for future electronics in 2021. He took an important role in the research of two-dimensional (2D) transition metal dichalcogenides (TMD) for electronics. He is recognized as the highly cited scholar by Clarivate since 2018 and top 1% scientist by the Universal Scientific Education and Research Network (USERN).

Abstract

With the dimension scaling, the transistor gate controllability becomes weaker owing to the pronounced source-drain tunneling. Hence, the transistor body thickness needs to be reduced to ensure efficient electrostatic control. New materials such as “ultra-thin” 2D semiconducting materials have attracted attention.In thistalk, I would like to provide analysis and arguments on the possibility to scale the device dimension, for example down to 1nm technology node, using 2D transition metal dichalcogenides (TMD) semiconductors. At a circuit level, I shall provide our analysis on benchmarking 2D-based circuits with the state-of-the-art Si FinFETs, where we use SRAM circuits as the example to discuss the benefits of using 2D over Si FinFET (or GAA) in the technology nodes from N16 down to N1. 

There are many challenges on device fabrication. Here, I we like to discuss on several major bottlenecks and the advancements we and collaborators have achieved recently. (1) We discover that hydroxide vapor phase epitaxy enables the growth of WS2 monolayers with a significantly lower density of structural defects, which make the electron mobility peaked at ~ 200 cm2/Vs. Other materials like MoS2 and WSe2 also benefit from this method (2) The mechanism of wafer-scale growth of 2D materials will be revisited. (3) Ultrahigh-k dielectrics can be applied onto short-channel (<30 nm) 2D monolayer transistors to greatly lower the subthreshold swing (down to 70 mV dec-1) with an ON/OFF current ratio up to 107. (4) Semimetal is a feasible contact metal to TMD monolayers.   




Seminar
 
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Links
 
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